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AP4224GM Pb Free Plating Product Advanced Power Electronics Corp. Low On-Resistance Simple Drive Requirement Dual N MOSFET Package RoHS Compliant SO-8 S1 G1 D1 D2 D1 D2 N-CHANNEL ENHANCEMENT MODE POWER MOSFET BVDSS RDS(ON) ID G2 S2 30V 14m 10A Description The Advanced Power MOSFETs from APEC provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. D1 D2 G1 S1 G2 S2 Absolute Maximum Ratings Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating 30 20 10 8 30 2 0.016 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit /W Data and specifications subject to change without notice 200623051-1/4 AP4224GM Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS BVDSS/Tj Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 30 1 - Typ. 0.03 16 23 6 14 12 8 34 16 400 280 0.9 Max. Units 14 20 3 1 25 100 35 V V/ m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Rg Static Drain-Source On-Resistance VGS=10V, ID=10A VGS=4.5V, ID=7A VDS=VGS, ID=250uA VDS=10V, ID=10A Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=30V, VGS=0V VDS=24V, VGS=0V VGS=20V ID=10A VDS=24V VGS=4.5V VDS=15V ID=1A RG=3.3,VGS=10V RD=15 VGS=0V VDS=25V f=1.0MHz f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance 2 1910 3070 Source-Drain Diode Symbol VSD Parameter Forward On Voltage 2 2 Test Conditions IS=1.7A, VGS=0V IS=10A, VGS=0V, dI/dt=100A/s Min. - Typ. 30 24 Max. Units 1.2 V ns nC trr Qrr Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 135 /W when mounted on min. copper pad. 2/4 AP4224GM 180 140 150 T A = 25 o C 10V 7.0V ID , Drain Current (A) 120 T A = 150 C o 10V 7.0V ID , Drain Current (A) 100 120 80 90 5.0V 60 5.0V 60 4.5V 40 4.5V 30 20 V G = 3 .0V V G = 3 .0V 0 0 1 2 3 4 5 0 0 1 2 3 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 20 1.8 18 ID=7A T A =25 Normalized RDS(ON) 1.6 I D =1 0 A V G =10V 16 1.4 RDS(ON) (m) 14 1.2 12 1.0 10 0.8 8 0.6 3 5 7 9 11 -50 0 50 100 150 V GS , Gate-to-Source Voltage (V) T j , Junction Temperature ( C) o Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 3.0 10 8 2.5 6 VGS(th) (V) IS(A) 2.0 4 T j =150 C o T j =25 C o 1.5 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.0 -50 0 50 100 150 V SD , Source-to-Drain Voltage (V) T j , Junction Temperature ( o C) Fig 5. Forward Characteristic of Reverse Diode Fig 6. Gate Threshold Voltage v.s. Junction Temperature 3/4 AP4224GM f=1.0MHz 16 10000 ID=10A VGS , Gate to Source Voltage (V) V DS =15V V DS =20V V DS =24V 12 C iss C (pF) 1000 8 4 C oss C rss 0 0 10 20 30 40 50 100 1 5 9 13 17 21 25 29 Q G , Total Gate Charge (nC) V DS , Drain-to-Source Voltage (V) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (Rthja) Duty factor=0.5 0.2 10 1ms ID (A) 0.1 0.1 0.05 1 10ms 100ms 0.02 PDM t T Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthja = 135/W 0.01 0.01 0.1 T A =25 o C Single Pulse 1s DC Single Pulse 0.01 0.1 1 10 100 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 V DS , Drain-to-Source Voltage (V) t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VDS 90% VG QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Q Fig 11. Switching Time Waveform Fig 12. Gate Charge Waveform 4/4 |
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